1. Field of the invention
This invention relates to a method for manufacturing a semiconductor device comprising forming elements such as damascene interconnects and an inter-layer connecting hole by a plating technique; and a plating apparatus and a sputtering apparatus therefor.
2. Description of the related art
A sputtering or CVD technique has been commonly used as a metal-film deposition procedure for forming interconnects and an inter-layer connecting hole in a semiconductor device. These techniques, however, require a considerable cost and a complicated process because a great deal of energy is applied to a metal compound to liberate or separate the metal from the corresponding metal compound for depositing the metal on a surface where a semiconductor device will be formed. Furthermore, sputtering may not provide adequate coverage. To solve these problems, electroplating for depositing a metal film has recently received attention.
A conventional manufacturing process for a semiconductor device will be described with reference to FIG. 5 in terms of forming damascene copper interconnects.
An insulating film 2 is deposited on a silicon substrate 1 and then a groove 5 is formed in a given area. Then, on the overall surface is deposited by sputtering a barrier-metal film 3 consisting of TiN e.g., 20 nm of thickness. Then, on the surface is deposited by sputtering a seed-metal film 4 consisting of copper for growing copper plating (FIG. 5(a)). The sputtering conditions are, for example, as follows; a substrate temperature: 0.degree. C., a sputter power: 2 kW, a pressure: 2 mTorr, and a distance between a target and the substrate: 60 mm.
Then, the substrate is subject to plating by immersing it in an aqueous solution of cupric sulfate at an ambient temperature.
The plated substrate is left at an ambient temperature to stabilize the structure of the copper (FIG. 5(b)). The treatment is hereinafter referred to as "self-annealing". Duration for the self-annealing is generally about 50 to 80 hours.
Then, the substrate surface is smoothed by chemical mechanical polishing (CMP) to form damascene copper interconnects.
The prior art has the following problems.
First, a void may be generated inside the groove or the hole due to shrinkage of the copper plating 9 during the self-annealing step. A copper plating has a sparse structure immediately after plating. After self-annealing the copper structure gradually comes to be thermodynamically stable as grains grow. In the course of the process, copper shrinks to generate a void 16 inside the groove as shown in FIG. 5(b).
Second, small grains in a seed-metal film deposited for forming a plating layer remain after the self-annealing, leading to a less reliable device.